chip northbridge/intel/e7520  # MCH
	chip drivers/generic/debug  # DEBUGGING
		device pnp 00.0 on end
		device pnp 00.1 off end
		device pnp 00.2 off end
		device pnp 00.3 off end
	end
	device pci_domain 0 on
		chip southbridge/intel/esb6300	# ESB6300
			register "pirq_a_d" = "0x0b070a05"
			register "pirq_e_h" = "0x0a808080"

			device pci 1c.0 on
				chip drivers/generic/generic
					device pci 01.0 on end	# onboard gige1
					device pci 02.0 on end 	# onboard gige2
				end
			end

			# USB ports
			device pci 1d.0 on end
			device pci 1d.1 on end
			device pci 1d.4 on end	# Southbridge Watchdog timer
			device pci 1d.5 on end	# Southbridge I/O apic1
			device pci 1d.7 on end

			# VGA / PCI 32-bit
			device pci 1e.0 on
				chip drivers/generic/generic
					device pci 01.0 on end
				end
			end


			device pci 1f.0 on 	# ISA bridge
				chip superio/winbond/w83627hf
					device pnp 2e.0 off end
					device pnp 2e.2 on
						 io 0x60 = 0x3f8
						irq 0x70 = 4
					end
					device pnp 2e.3 on
						 io 0x60 = 0x2f8
						irq 0x70 = 3
					end
					device pnp 2e.4 off end
					device pnp 2e.5 off end
					device pnp 2e.6 off end
					device pnp 2e.7 off end
					device pnp 2e.9 off end
					device pnp 2e.a on end
					device pnp 2e.b off end
				end
			end
			device pci 1f.1 on end
			device pci 1f.2 off end
			device pci 1f.3	on end		# SMBus
			device pci 1f.5 off end
			device pci 1f.6 off end
		end

		device pci 00.0	on end	# Northbridge
		device pci 00.1	on end  # Northbridge Error reporting
		device pci 01.0 on end
		device pci 02.0 on
			chip southbridge/intel/pxhd	# PXHD 6700
				device pci 00.0 on end   # bridge
				device pci 00.1 on end   # I/O apic
				device pci 00.2 on end   # bridge
				device pci 00.3 on end   # I/O apic
			end
		end
#	 	device register "intrline" = "0x00070105"
		device 	pci 04.0 on end
		device 	pci 06.0 on end
	end

	device lapic_cluster 0 on
		chip cpu/intel/socket_mPGA604  	# CPU 0
			device lapic 0 on end
		end
		chip cpu/intel/socket_mPGA604 	# CPU 1
			device lapic 6 on end
		end
	end
end
