build/southbridge/amd/cimx/sb800/late.ramstage.o: \
 src/southbridge/amd/cimx/sb800/late.c src/include/kconfig.h \
 build/config.h src/include/device/device.h src/arch/x86/include/stdint.h \
 src/include/stddef.h src/include/rules.h src/include/device/resource.h \
 src/include/device/path.h src/include/device/pci.h \
 src/arch/x86/include/arch/io.h src/include/device/pci_def.h \
 src/include/device/pci_ops.h src/arch/x86/include/arch/pci_ops.h \
 src/include/device/pci_rom.h src/arch/x86/include/arch/byteorder.h \
 src/include/swab.h src/include/device/pci_ids.h src/include/bootstate.h \
 src/include/string.h src/include/stdlib.h \
 src/arch/x86/include/arch/ioapic.h src/include/device/smbus.h \
 src/include/device/smbus_def.h src/include/pc80/mc146818rtc.h \
 src/include/types.h src/include/pc80/i8254.h src/include/pc80/i8259.h \
 src/include/console/console.h src/include/console/post_codes.h \
 src/include/console/early_print.h src/include/console/streams.h \
 src/include/console/loglevel.h src/arch/x86/include/arch/acpi.h \
 src/include/device/pci_ehci.h src/southbridge/amd/cimx/sb800/lpc.h \
 src/southbridge/amd/cimx/sb800/SBPLATFORM.h \
 src/southbridge/amd/cimx/sb800/AmdSbLib.h \
 src/southbridge/amd/cimx/sb800/Amd.h \
 src/vendorcode/amd/cimx/sb800/SB800.h \
 src/vendorcode/amd/cimx/sb800/SBTYPE.h \
 src/vendorcode/amd/cimx/sb800/ACPILIB.h \
 src/vendorcode/amd/cimx/sb800/SBDEF.h \
 src/southbridge/amd/cimx/sb800/AMDSBLIB.h \
 src/vendorcode/amd/cimx/sb800/SBSUBFUN.h \
 src/mainboard/asrock/e350m1/platform_cfg.h \
 src/vendorcode/amd/cimx/sb800/OEM.h src/southbridge/amd/cimx/sb800/AMD.h \
 src/vendorcode/amd/cimx/sb800/AMDSBLIB.h \
 src/southbridge/amd/cimx/sb800/cfg.h \
 src/southbridge/amd/cimx/sb800/chip.h \
 src/southbridge/amd/cimx/sb800/fan.h \
 src/southbridge/amd/cimx/sb800/sb_cimx.h \
 src/southbridge/amd/cimx/sb800/smbus.h \
 src/southbridge/amd/amd_pci_util.h \
 src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h
