build/vendorcode/amd/agesa/Proc/Mem/Feat/INTLVRN/mfintlvrn.ramstage.o: \
 src/vendorcode/amd/agesa/Proc/Mem/Feat/INTLVRN/mfintlvrn.c \
 e:/temp/persimmon_05-31-2011/coreboot/build/config.h \
 src/vendorcode/amd/agesa/AGESA.h src/vendorcode/amd/agesa/Porting.h \
 src/arch/x86/include/stddef.h \
 src/vendorcode/amd/agesa/Include/gcc-intrin.h src/include/assert.h \
 src/include/console/console.h src/arch/x86/include/stdint.h \
 src/include/console/loglevel.h src/include/console/post_codes.h \
 src/vendorcode/amd/agesa/AMD.h src/vendorcode/amd/agesa/Lib/amdlib.h \
 src/vendorcode/amd/agesa/Proc/Mem/mport.h \
 src/vendorcode/amd/agesa/Proc/Mem/mm.h \
 src/vendorcode/amd/agesa/Proc/Mem/mn.h \
 src/vendorcode/amd/agesa/Proc/Mem/Feat/INTLVRN/mfintlvrn.h \
 src/vendorcode/amd/agesa/Include/Ids.h \
 src/mainboard/amd/persimmon/OptionsIds.h \
 src/vendorcode/amd/agesa/Include/Filecode.h \
 src/vendorcode/amd/agesa/Include/Filecode.h
