.section ".rom.data"
.balign 16
L1:
.int 0xff, 0, 0, 0
L2:
.int 0xffff, 0, 0, 0
.section ".rom.text"
	/* ,(null):0.0 */
L1001:
L1002:
	/* main,bootblock_simple.c:15.50 */
.section ".rom.data"
.balign 1
L1003:
.byte 0x66
.byte 0x61
.byte 0x6c
.byte 0x6c
.byte 0x62
.byte 0x61
.byte 0x63
.byte 0x6b
.byte 0x2f
.byte 0x72
.byte 0x6f
.byte 0x6d
.byte 0x73
.byte 0x74
.byte 0x61
.byte 0x67
.byte 0x65
.byte 0x00
.section ".rom.text"
	/* ,(null):0.0 */
	/* ,:0.0 */
#ASM
	
#NOT ASM
	/* ,:0.0 */
	mov %eax, %ebp
	/* ,:0.0 */
	/*
	 * __builtin_rdmsr,<built-in>:1.0
	 * rdmsr,msr.h:10.31
	 * boot_cpu,boot_cpu.c:7.20
	 * main,bootblock_simple.c:5.21
	 */
	mov  $27 , %ecx
	rdmsr
	/*
	 * boot_cpu,boot_cpu.c:8.34
	 * main,bootblock_simple.c:5.21
	 */
	/*
	 * boot_cpu,boot_cpu.c:8.35
	 * main,bootblock_simple.c:5.21
	 */
	and  $256 , %eax
	/* main,bootblock_simple.c:5.23 */
	test %eax, %eax
	jz L1005
L1004:
	/*
	 * pci_io_read_config32,romcc_io.h:133.38
	 * sb800_enable_rom,bootblock.c:36.31
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_read_config32,romcc_io.h:133.13
	 * sb800_enable_rom,bootblock.c:36.31
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $-2147441852 , %eax
	mov  $3320 , %dx
	outl %eax, %dx
	/* ,:0.0 */
	/*
	 * __builtin_inl,<built-in>:1.0
	 * inl,io.h:41.29
	 * pci_io_read_config32,romcc_io.h:134.19
	 * sb800_enable_rom,bootblock.c:36.31
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $3324 , %dx
	inl %dx, %eax
	/*
	 * sb800_enable_rom,bootblock.c:39.21
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	/*
	 * pci_io_write_config32,romcc_io.h:225.38
	 * sb800_enable_rom,bootblock.c:40.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_write_config32,romcc_io.h:225.13
	 * sb800_enable_rom,bootblock.c:40.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $-2147441852 , %eax
	mov  $3320 , %dx
	outl %eax, %dx
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_write_config32,romcc_io.h:226.13
	 * sb800_enable_rom,bootblock.c:40.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $-1 , %eax
	mov  $3324 , %dx
	outl %eax, %dx
	/*
	 * pci_io_read_config32,romcc_io.h:133.38
	 * sb800_enable_rom,bootblock.c:49.31
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_read_config32,romcc_io.h:133.13
	 * sb800_enable_rom,bootblock.c:49.31
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $-2147441848 , %eax
	mov  $3320 , %dx
	outl %eax, %dx
	/* ,:0.0 */
	/*
	 * __builtin_inl,<built-in>:1.0
	 * inl,io.h:41.29
	 * pci_io_read_config32,romcc_io.h:134.19
	 * sb800_enable_rom,bootblock.c:49.31
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $3324 , %dx
	inl %dx, %eax
	/*
	 * sb800_enable_rom,bootblock.c:50.56
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	or  $2097235 , %eax
	mov %eax, %esp
	/*
	 * pci_io_write_config32,romcc_io.h:225.38
	 * sb800_enable_rom,bootblock.c:51.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_write_config32,romcc_io.h:225.13
	 * sb800_enable_rom,bootblock.c:51.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $-2147441848 , %eax
	mov  $3320 , %dx
	outl %eax, %dx
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_write_config32,romcc_io.h:226.13
	 * sb800_enable_rom,bootblock.c:51.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $3324 , %dx
	mov %esp, %eax
	outl %eax, %dx
	/*
	 * pci_io_read_config16,romcc_io.h:102.38
	 * sb800_enable_rom,bootblock.c:55.30
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_read_config16,romcc_io.h:102.13
	 * sb800_enable_rom,bootblock.c:55.30
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $-2147441812 , %eax
	mov  $3320 , %dx
	outl %eax, %dx
	/* ,:0.0 */
	/*
	 * __builtin_inw,<built-in>:1.0
	 * inw,io.h:36.29
	 * pci_io_read_config16,romcc_io.h:103.19
	 * sb800_enable_rom,bootblock.c:55.30
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $3324 , %dx
	inw %dx, %ax
	/* ,:0.0 */
	/*
	 * pci_io_write_config16,romcc_io.h:194.38
	 * sb800_enable_rom,bootblock.c:57.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	/* ,:0.0 */
	/*
	 * __builtin_outl,<built-in>:1.0
	 * outl,io.h:24.23
	 * pci_io_write_config16,romcc_io.h:194.13
	 * sb800_enable_rom,bootblock.c:57.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $-2147441812 , %eax
	mov  $3320 , %dx
	outl %eax, %dx
	/* ,:0.0 */
	/*
	 * __builtin_outw,<built-in>:1.0
	 * outw,io.h:19.23
	 * pci_io_write_config16,romcc_io.h:195.13
	 * sb800_enable_rom,bootblock.c:57.24
	 * bootblock_southbridge_init,bootblock.c:63.19
	 * main,bootblock_simple.c:7.43
	 */
	mov  $65472 , %ax
	mov  $3324 , %dx
	outw %ax, %dx
	/* main,bootblock_simple.c:5.23 */
L1005:
	/* main,bootblock_simple.c:15.50 */
	/*
	 * walkcbfs,cbfs.h:7.85
	 * findstage,cbfs.h:19.57
	 * main,bootblock_simple.c:17.26
	 */
	mov  $L1003+0 , %esi
#ASM
	mov $1f, %esp
	jmp walkcbfs_asm
	1:
	
#NOT ASM
	/*
	 * findstage,cbfs.h:19.65
	 * main,bootblock_simple.c:17.26
	 */
	mov %eax, %esp
	/*
	 * findstage,cbfs.h:20.1
	 * main,bootblock_simple.c:17.26
	 */
	add  $4 , %esp
	/*
	 * findstage,cbfs.h:19.73
	 * main,bootblock_simple.c:17.26
	 */
	movl (%esp), %esp
	/* main,bootblock_simple.c:18.18 */
	test %esp, %esp
	jz L1007
L1006:
	/*
	 * call,cbfs.h:24.64
	 * main,bootblock_simple.c:18.24
	 */
	mov %ebp, %eax
#ASM
	jmp *%esp
	
#NOT ASM
	/* main,bootblock_simple.c:18.18 */
L1007:
	/* main,bootblock_simple.c:19.49 */
#ASM
	1:
	hlt
	jmp 1b
	
#NOT ASM
	/* ,:0.0 */
 /* unknown %eax */
 /* unknown %ebx */
 /* unknown %ecx */
 /* unknown %edx */
#ASM
	
#NOT ASM
/* max inline depth 6 */
